Design of a Multipurpose Ternary Arithmetic Circuit Using CNTFET

Abstract

Abstract

In this paper, a multipurpose ternary arithmetic circuit is presented for ternary processors based on carbon nanotube field effect transistors (CNTFETs). Both addition and subtraction can be performed using same circuit’s configuration, which is the special feature of the proposed circuit. The combination of pseudo and complimentary logic structure are employed to blend the binary and ternary logic techniques. The propagation delay and power delay product are 139.5 pico second and 3.18 femto Joule, which indicates significant improvement in power consumption, delay and PDP, compared to few recent ternary full adder designs.

Keywords: Ternary arithmetic circuits, ternary full adder, TFA, ternary full subtractor, TFS

Cite this Article

Kazi Muhammad Jameel, Mohammad Abdul Mannan, Md. Tanvir Hasan. Design of a Multipurpose Ternary Arithmetic Circuit Using CNTFET. Journal of Semiconductor Devices and Circuits. 2016; 3(1): 13–24p.