Simulation of Three Section Multilevel Inverter with Reduced Range of Switches

Abstract

Because of high generation development, the demand and excellent of electric strength is
higher than earlier than. Furthermore, due to the advancement of semiconductor, the
specification of electricity devices and strength conversion method turn out to be stricter. One
of the energy converters that may remodel DC to AC is called inverter. An inverter is the inter
medium to transmit the electricity to other electric device such as an uninterruptible
electricity supply, servo motor, air-conditioner and smart grid devices. In recent years, the
amount of power gadget is increasing. Therefore, the harmonic pollution on strength systems
turns into extra serious. For that reason, several requirements and rules have been formulated
to restrict the fine of harmonics and power issue of electrical system including IEEE Std. 1547
and UL 1741. Furthermore, as the industry has all started to demand better strength
packages, the specification of strength gadgets is higher. Although the IGBT has capabilities
of excessive electricity and high voltage, incapable of being operated at excessive frequency
and the complex design of gate driving force are the primary disadvantages of the IGBT. By
contrast, the MOSFET is more appropriate to be operated at high frequency, but power rating
is not as good as the IGBT. In view of these, many different multilevel topologies are designed
to solve the problem with using low rating components in high power application. The cause
of the multilevel topology is to reduce the voltage score of strength switches. By combining
output voltages in multilevel form, there are advantages such as: low dv/dt of power
components, low distortion of input current and output voltage, and lower switching
frequency. SPWM technique is used to reduce the harmonics and power quality.

Keywords: Diode, MOSFET, multilevel inverter, thyristor, transistor