Journal of VLSI Design Tools & Technology (JoVDTT)

Vol 8, No 2 (2018)

Open Access  Subscription or Fee Access

Table of Contents

Articles

High Gain Antenna Array (2x1 and 4x1) Design for WLAN Application Devendra Sharma, Charanjeet Singh

PDF 1-8

Design of Three-Stage Pipelined Floating Point Arithmetic Operators Shaikh Shoaib Arif, B. B. Godbole

PDF 9-22

Characterization of Low Power-Low Jitter Digital PLL Nilesh D. Patel, Amisha P. Naik

PDF 23-32

Comparative Analysis of Different SRAM Cells Architecture at 70 nm Nidhi Tiwari, Vaibhav Neema, Kamal J. Rangra, Yogesh Chandra Sharma

PDF 33-41

A Review on FPGA Parallel Architecture for Object Detection Sudhir Dagar, Geeta Nijhawan

PDF 42-48

Investigation and Dependency Analysis of Silicon Film Thickness on Performance of Surrounding Gate MOSFET at Subthreshold Regime Tarun Kumar Sachdeva, S. K. Agarwal, Alok K. Kushwaha

PDF 49-54

A Review on Tunnel Field Effect Transistor for Ambipolar Suppression, Higher ON Current and a Lower Subthreshold Swing Radhika M. Somani, H. R. Upadhyay, K. Sujatha

PDF 55-66

Area and Power Improvement with New Initial Ordering Method Combined with Sift Algorithm for BDD Mapped Circuits M. Balal Siddiqui, M. T. Beg, S. Naseem Ahmad

Untitled PDF 67-71

A Common Mode Scan Based BIST for Stuck-at-Fault and Path Delay Fault Ram Vishnu S, Yasodha T

PDF 72-78

eISSN: 2249–474X