|
Issue |
Title |
|
Vol 5, No 2 (2015) |
Automated Access Backdoor for UVM_REG Layer |
Abstract
|
Seep Sethi, Neeraj Kr. Shukla |
|
Vol 1, No 1-2-3 (2011) |
Automatic Switch cum Fuse IC for Low Voltage, Low Power, High Performance Current Conveyors |
Abstract
PDF
|
ashutosh tripathi |
|
Vol 8, No 1 (2018) |
AXI Bridge and DMA/Bridge Subsystem for PCIe |
Abstract
|
Shivani Malhotra, Neelam Rup Prakash |
|
Vol 7, No 3 (2017) |
Carbon Nanotube Transistor Based Novel Ring Oscillator with Minimum Power Consumption at 32 nm Technology Node |
Abstract
PDF
|
Chandramohan K, Nikhil Saxena, Sapna Navre, Sonal Soni |
|
Vol 7, No 2 (2017) |
Carbon Nanotube Transistor Based Novel Ring Oscillator with Minimum Power Consumption at 32 nm Technology Node |
Abstract
|
Nikhil Saxena, chandramoham K, Sapna Navre, Sonal Soni |
|
Vol 6, No 2 (2016) |
Challenges Beyond 100 nm MOS Devices |
Abstract
|
savita maurya, sarita Shrivastava |
|
Vol 5, No 2 (2015) |
Characterization of High Performance Third Generation Current Conveyor using CMOS Technology |
Abstract
|
Megha M. Patel, Nilesh D. Patel |
|
Vol 5, No 1 (2015) |
Characterization of High Speed Phase Frequency Detector Circuit |
Abstract
|
Nilesh D. Patel, Amisha P. Naik |
|
Vol 8, No 2 (2018) |
Characterization of Low Power-Low Jitter Digital PLL |
Abstract
|
Nilesh D. Patel, Amisha P. Naik |
|
Vol 8, No 3 (2018) |
Circular Retiming technique to design Optimized Least Mean square architecture for adaptive filter |
Abstract
|
Jalaja S., Vijaya Prakash A. M |
|
Vol 6, No 1 (2016) |
Cluster Based Sleep Transistor Approach for Low Power 6T SRAM Cell |
Abstract
|
P. Raikwal, V. Neema, A. Verma |
|
Vol 5, No 3 (2015) |
CMOS Gm-C IF Filter using SCA for Dual Band Receiver |
Abstract
|
Kehul A. Shah, NM Devashrayee |
|
Vol 3, No 2 (2013) |
Cogeneration of Fast Motion Estimation Processor and Algorithms Using Loss Less Compression |
Abstract
|
M. Viji, S. Chitra |
|
Vol 5, No 2 (2015) |
Comparative Analysis of Class-AB Voltage Follower using DTMOS Transistor |
Abstract
|
Nishtha K. Patel, Nilesh D. Patel |
|
Vol 12, No 2 (2022) |
Comparative Analysis of CMOS CNFET and Memristor Based Full Adder Circuits and CMOS Memristor Based Multiplexer Circuits |
Abstract
|
Rumaisa Uzma, M. A. Sayyad |
|
Vol 8, No 1 (2018) |
Comparative Analysis of Combinational Circuit Using Reversible Logic Based Techniques |
Abstract
|
Aakriti Dawarand, Bal Krishan |
|
Vol 8, No 2 (2018) |
Comparative Analysis of Different SRAM Cells Architecture at 70 nm |
Abstract
|
Nidhi Tiwari, Vaibhav Neema, Kamal J. Rangra, Yogesh Chandra Sharma |
|
Vol 5, No 2 (2015) |
Comparative Analysis of High Speed Comparator for A to D Converters |
Abstract
|
Priyesh Gandhi, Neha B. Rathod, N. M. Devashrayee |
|
Vol 4, No 2 (2014) |
Comparative Analysis of Low-Power Adiabatic Techniques |
Abstract
|
charu rana, priyanka ojha |
|
Vol 6, No 2 (2016) |
Comparative Analysis of MOSFET, CNTFET and NWFET for High Performance VLSI Circuit Design: A Review |
Abstract
|
sanjeev kumar sharma, balwinder raj, mamta khosla |
|
Vol 13, No 1 (2023) |
Comparative Analysis of Partial Product Addition in Vedic Urdhva Tiryakbhyam Multiplier |
Abstract
|
M S, B. S. Agarkar |
|
Vol 7, No 1 (2017) |
Comparative Analysis of Phase Frequency Detector for Phase-Locked Loops |
Abstract
|
Gunjankumar R Modi, Priyesh P Gandhi, Nilesh D Patel |
|
Vol 3, No 2 (2013) |
Comparative Study of a 32 bit Clock Gated ALU based on Carry Skip Adder and Ripple Carry Adder |
Abstract
|
Ankit Mitra |
|
Vol 5, No 2 (2015) |
Comparative Study of (Operational Transconductance Amplifier) OTA to Design Low Pass Filter |
Abstract
|
Aakansha Barala, Pooja Sabherwal, Meenakshi Yadav |
|
Vol 12, No 1 (2022) |
Comparison of RSA and ECC Public key Cryptography Techniques in WSN |
Abstract
|
S. Aruna Deepthi, E. Sreenivasa Rao, Pavan Kumar |
|
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