Performance Evaluation of First and Second-order Incremental A/D Converters

Authors

  • Pramod Singh Department of ECE, MIET, Meerut,250005 India
  • Maneesha Gupta Division of ECE, NSIT, Dwarka, New Delhi,110078 India
  • A. K. Yadav Division of ICE, NSIT, Dwarka, New Delhi, India

DOI:

https://doi.org/10.37591/joedt.v4i3.4893

Abstract

This paper presents the design of first and second-order incremental analog-to-digital converters (ADCs). The characteristics of converters are extremely wide from Giga samples to a few samples per second for bandwidth and resolution variation from a few bits to more than 20 bits. Delta sigma converters are most commonly used high-resolution A/D converters. In instrumentation and measurement applications, the continuous operation, the large offset and inaccurate gain of delta-sigma does not satisfy the specifications. The incremental converters are also based on delta-sigma architecture but work in transient mode are more adapted.

 

Published

2021-01-02

Issue

Section

RESEARCH ARTICLES