Open Access Open Access  Restricted Access Subscription or Fee Access

A Novel Architecture of Control System Processor Using Field Programmable Gate Array

Arindam Biswas, Amitabha Sinha

Abstract


This paper presents a reconfigurable architecture of control system processor. The performance of the proposed architecture has been evaluated by taking different controllers and phase lead and phase lag networks. We designed the architecture of the processor and realizing the architecture using adder, multiplier, delay unit and validate it in the FPGA, which show that the hardware scheme is feasible for practical application. The experimental results clearly reveal the novelty of the architecture for control system. This paper investigates the potential use of FPGAs for implementing efficient “Reconfigurable Processor” for control system applications. The proposed processor is based on parallel re-configurable which is implemented on FPGA. FPGAs have become an important component for implementing these functions with respect to cost, performance and flexibility. The general purpose SPARTAN 3AN FPGA kit has been employed for developing reconfigurable processor, with all the coding done using the hardware description language VERILOG.


Keywords


Field programmable gate array (FPGA), reconfigurable architecture, digital signal processor (DSP), application specific integrated circuit (ASIC), basic building block (BBU), functional unit (FU), system on chip (SOC), configurable logic block (CLB), look

Full Text:

PDF

References


Amrita Saha, Amitabha Sinha. Radio Processor – A New Reconfigurable Architecture for Software Defined Radio, Proc. ICCSIT, IEEE conf., Singapore, 2008.

Amrita Saha, Amitabha Sinha. An FPGA Based Architecture of A Novel Reconfigurable Radio Processor for Software Defined Radio, IEEE conf., April 2008.

Amiya Karmakar, Amitabha Sinha. Novel Architecture of a Reconfigurable Radio Processor for Implementing Different Modulation Schemes, IEEE conf., 2011.

Chris H Dick. Design and Implementation of High-Performance FPGA Signal Processing, Datapaths for Software Defined Radios. Xilinx Inc., www.xilinx.com.

www.ti.com

www.analog.com

Pavel Sinha, Amitabha Sinha, Dhruba Basu. A Novel architecture of a Reconfigurable Parallel DSP Processor. Proc. The 3rdInt IEEE Northwest Workshop on Circuit and System, June 19-22, Quebec, Canada, 2005; 71–74p.

Xilinx. Introduction and overview, vertex-II Pro Platform FPGAs, March 9th, 2004.

Chris H Dick. Design and Implementation of High-Performance FPGA Signal Processing. Datapaths for Software Defined Radios. Xilinx Inc., www.xilinx.com.

Parthi KK. VLSI Digital Signal Processing Systems. A Wiley-Inter science Publication, 1999.

Buyer’s guide to DSP Processors, 2004 Edition. Barkley Design Technology Inc., www.BDTI.com.

Joanne De Groat, Gursharam Reehal, Nagarjuna. Synthesizing FPGA Digital Modules for Software Defined Radio, IEEE conf. 2008.

Frank Harry. Graph Theory, Addison-Wesley publishing company, 1969.

Singh R. Signal Integrity Effects in Custom IC and ASIC Design, Willey-IEEE Press, ISBN: 0-471-15042-8, December 2001.

Mitola J, Maguire GQ. Cognitive radio: making software radios more personal, Personal Communications, IEEE conf., 1999; Volume 6(4):13–18p.




DOI: https://doi.org/10.37591/jomea.v2i2.5271

Refbacks

  • There are currently no refbacks.


Copyright (c) 2021 Journal of Microcontroller Engineering and Applications