Numerical Simulation and Modeling of Self Heating in SOI MOSFET

Authors

  • Arun Dev Dhar Dwivedi Department of Electrical and Electronics Engineering, Poornima University Jaipur
  • Akansha Choudhary
  • Simranjeet Singh Sudan

DOI:

https://doi.org/10.37591/josdc.v5i3.1311

Abstract

Abstract

 As the device size has been reduced the temperature increment of high-performance very large scale integrations (VLSIs) becomes a major issue. The self-heating effect and non-uniform power distribution in VLSIs, affect the performance of device. In this paper numerical simulation of self heating in SOI MOSFET has been performed. Poisson's equation, continuity equation, energy balance equation and heat flow equations have been solved self consistently using finite element method with the help of 2D device simulation software ATLAS from Silvaco Inc. Also simulation of distribution of lattice temperature inside the device has been performed.

Keywords: Silicon on insulator (SOI), self heating, numerical simulation, energy balance model

Cite this Article

Akansha Choudhary, Dwivedi ADD, Simranjeet Singh Sudan. Numerical Simulation and Modeling of Self Heating in SOI MOSFET. Journal of Semiconductor Devices and Circuits. 2018; 5(3): 18–23p.


Author Biography

  • Arun Dev Dhar Dwivedi, Department of Electrical and Electronics Engineering, Poornima University Jaipur
    Arun Dev Dhar Dwivedi has received the M.Sc. degree in Physics (Electronics) from BHU, Varanasi, India in 2003 and Ph.D. degree in Electronics Engineering from IIT (BHU) Varanasi, in 2010. He is currently working as Professor in Electrical and Electronics Engineering, Poornima University Jaipur. He Worked as a Visiting Scientist in Nanoelectronic group at the Laboratory IMS-CNRS-UMR5218, University of Bordeaux, Talence, France during 2014-2015. He also worked as senior Device modeling Engineer in Spice modeling division of  Silvaco Singapore office and as an Assistant Professor at Central University of Rajasthan and Central university of Jharkhand. He has given several invited talks in India and abroad at international meetings. He also worked as SRF and JRF at centre for research in microelectronics, IIT BHU Varanasi.  He is senior member of IEEE and Branch counselor IEEE students branch Poornima University Jaipur. He is in Editorial board member of International Journal of Advanced Applied Physics Research (IJAAPR), International Journal of Electrical Communication Engineering (IJECE), International Journal of Microelectronics and Digital Integrated Circuits (IJMDIC), International Journal of Analogue Integrated Circuits (IJAIC), International Journals of Power Electronics Controllers and Converters (IJPECC). He has been awarded by Early Career Researchaward from science and engineering research board (SERB) Department of Science and Technology (DST) Government of India and research grant of 50 lacks has been approved for his project entitled " Numerical simulation and compact modeling of organic thin film transistors for future flexible electronics". He has published more than 25 papers in international Journals and 25 papers in conference/seminars. He is reviewer of various international journals like IEEE transaction on electron devices, Organic electronics, journal of electronic materials etc.

    His research interest includes Microelectronics and VLSI design, Optoelectronics and Optical communication, Organic electronics, Semiconductor device Physics, Nanoelectronics, Technology Computer Aided Design (TCAD), EDA, Compact device modeling for IC design, Analog and Digital Integrated circuits and Infrared photodetectors.

     

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Published

2018-12-20

Issue

Vol. 5 No. 3 (2018)

Section

Research Articles