Verilog Implementation of a Turbo Encoder and Decoder with MAP-Based Decoding

Abstract

The most significant achievement in coding theory is the turbo codes which are forward error correction codes developed in 1993. By using two simple recursive systematic convolutional codes in parallel we can achieve near-capacity performance in transmission system which was defined by Shannon-Fano. By using iterative decoding structure near-capacity performance is possible with a relatively easy decoding complexity, using a soft in soft out (SISO) maximum a posteriori (MAP) decoding algorithm. In this paper we first designed the turbo encoder with two recursive systematic convolutional (RSC) codes connected in parallel with an interleaver and the turbo decoder uses the MAP algorithm with iterative decoding. The model was implemented using MATLAB R2013a and in Verilog using XILINX ISE 8.1 Tools