Design of Active Filter using CMOS based IInd Generation Current Conveyor in Current Mode

Authors

  • Vandana Khanna
  • Srishti Singhal
  • Sushant Nagpal

DOI:

https://doi.org/10.37591/jovdtt.v9i1.1419

Abstract

Traditional design techniques used in VLSI are in voltage mode, but these have drawbacks like low bandwidth, non-linearity and less gain. Current conveyors act similar to operational amplifiers but are advantageous over older VLSI design techniques because of high bandwidth-gain product, reduced power consumption etc. This paper consists of two parts: circuit diagram of current conveyor (which is a three terminal analog device) is discussed first and its working is analyzed, followed by the discussion on design of a universal active filter using current conveyor. If various bias currents are varied in active filter design across the passive components, the expected low-pass, high-pass and band-pass responses are obtained. This experiment was done in 45 nm CMOS technology using Cadence Virtuoso.

Keywords: Active filter, frequency range, cadence, CCII±, CC, CCIII, translinear, current mirrors

Cite this Article

Srishti Singhal, Sushant Nagpal, Vandana Khanna. Design of Active Filter using CMOS Based IInd Generation Current Conveyor in Current Mode. Journal of VLSI Design Tools & Technology. 2019; 9(1): 15–21p.


 

Published

2019-04-20

Issue

Section

Articles