Design of FPGA Based ALU Using Reversible Logic Gates
Abstract
Reversible or information misfortune less circuits has applications in computerized signal handling, correspondence, PC design and nanotechnology. Reversible technique is utilized to minimize heat that happens in traditional circuits by keeping the loss of data. This paper proposes a reversible configuration of an ALU. This ALU comprises of eight operations, five are of arithmetic category and three are from logical category operations. An arithmetic operations incorporate add, sub, increase by one, decrement by one, multiply whereas logical operations incorporate AND, OR, and XOR. Each module is being composed utilizing the fundamental reversible basic gates. The Area analysis, power analysis and delay analysis of the different sub modules is performed and a correlation with the conventional circuits is likewise completed. We designed the ALU in Verilog HDL and Simulated by using Modelsim 6.4c Software. The proposed ALU Design is synthesized by Xilinx and Implemented into FPGA Spartan 2 XC2S200PQ208.
Keywords: VLSI, quantum cost, ALUt, revesible gate, reversible logic
Full Text:
PDFDOI: https://doi.org/10.37591/jovdtt.v6i3.2999
Refbacks
- There are currently no refbacks.
Copyright (c) 2019 Journal of VLSI Design Tools & Technology
eISSN: 2249–474X