Effect of Various Parameters on Threshold Voltage of Virtually Fabricated Lightly Doped PMOS Device

Authors

  • nitin sachdeva Department of Electronics Engineering, YMCA University of Science and Technology, Faridabad, Haryana India Department of Electronics Engineering, Malout Institute of Management and Information Technology, Malout, Punjab, India
  • munish vashishath
  • P K bansal

DOI:

https://doi.org/10.37591/jovdtt.v7i2.3022

Abstract

This paper emphasis on the design, fabrication and analysis of 45 nm P type MOSFET device using SILVACO TCAD tool. The analysis was based on variation of various parameters like oxide thickness, threshold implant and halo implant (pockets) to analyze the threshold voltage. The drain versus gate and drain versus gate plots are being plotted using tony-plot. It has been observed that as the thickness of the oxide increases, threshold voltage also increases. Various other parameters like on current, off current, On/Off current ratio and DIBL has also been calculated for different oxide thicknesses. From the simulation results, the optimum threshold voltage of -0.026 V has been achieved.

 

Keywords: MOSFET, SILVACO, threshold voltage, DIBL, Athena

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Published

2019-08-13

Issue

Vol. 7 No. 2 (2017)

Section

Articles

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