Arif, Shaikh Shoaib, Research Scholar (VLSI), Department of Electronics and Telecommunication Engineering, Dr. Babasaheb Ambedkar Marathwada University, Aurangabad, Maharashtra, India, India
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Vol 8, No 2 (2018) - Articles
Design of Three-Stage Pipelined Floating Point Arithmetic Operators
Abstract
eISSN: 2249–474X