Design of a 4X4 Network-on-Chip Crossbar Router in a System-on-Chip

Abstract

With the number of IPs increasing in an SoC, there is a need for achieving high bandwidth, low latency, scalable multi-core intercommunication and solve the shortcoming of buses. Network-on-chip is a technology which is a solution for such problems. Network-on-chip solves the problem by implementing a communication network of switches, routers and resources. This paper proposes a design for communication among subsystems between intellectual property cores in an SoC design. The specifications of the design are written in HDL and the simulation is done using Synopsys-VCS.