Numerical Simulation of Pentacene based Organic Thin Film Transistor with Inorganic Gate Dielectrics

Authors

  • Arun Dev Dhar Dwivedi Department of Electrical and Electronics Engineering, Poornima University Jaipur
  • Pooja Kumari

DOI:

https://doi.org/10.37591/jomsd.v6i2.3341

Keywords:

component, formatting, style, styling, insertIntroduction

Abstract

This paper presents a 2D numerical simulation and Electrical Characterization of Pentacene (Organic semiconductor) based Organic thin film transistor (OTFT) devices with different inorganic gate dielectrics materials SiO2, Al2O3 and HfO2 and Electrical parameters including; Mobility (µ), Threshold Voltage (Vt), Ion/Ioff ,Sub threshold slope (SS) and Transconductance (gm) are extracted.

Author Biography

Arun Dev Dhar Dwivedi, Department of Electrical and Electronics Engineering, Poornima University Jaipur

Arun Dev Dhar Dwivedi has received the M.Sc. degree in Physics (Electronics) from BHU, Varanasi, India in 2003 and Ph.D. degree in Electronics Engineering from IIT (BHU) Varanasi, in 2010. He is currently working as Professor in Electrical and Electronics Engineering, Poornima University Jaipur. He Worked as a Visiting Scientist in Nanoelectronic group at the Laboratory IMS-CNRS-UMR5218, University of Bordeaux, Talence, France during 2014-2015. He also worked as senior Device modeling Engineer in Spice modeling division of  Silvaco Singapore office and as an Assistant Professor at Central University of Rajasthan and Central university of Jharkhand. He has given several invited talks in India and abroad at international meetings. He also worked as SRF and JRF at centre for research in microelectronics, IIT BHU Varanasi.  He is senior member of IEEE and Branch counselor IEEE students branch Poornima University Jaipur. He is in Editorial board member of International Journal of Advanced Applied Physics Research (IJAAPR), International Journal of Electrical Communication Engineering (IJECE), International Journal of Microelectronics and Digital Integrated Circuits (IJMDIC), International Journal of Analogue Integrated Circuits (IJAIC), International Journals of Power Electronics Controllers and Converters (IJPECC). He has been awarded by Early Career Researchaward from science and engineering research board (SERB) Department of Science and Technology (DST) Government of India and research grant of 50 lacks has been approved for his project entitled " Numerical simulation and compact modeling of organic thin film transistors for future flexible electronics". He has published more than 25 papers in international Journals and 25 papers in conference/seminars. He is reviewer of various international journals like IEEE transaction on electron devices, Organic electronics, journal of electronic materials etc.

His research interest includes Microelectronics and VLSI design, Optoelectronics and Optical communication, Organic electronics, Semiconductor device Physics, Nanoelectronics, Technology Computer Aided Design (TCAD), EDA, Compact device modeling for IC design, Analog and Digital Integrated circuits and Infrared photodetectors.

 

References

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A.D.D. Dwivedi, Rajeev Dhar Dwivedi, Raghvendra Dhar Dwivedi, Sumit Vyas and P. Chakrabarti, "Numerical simulation of P3HT based Organic Thin Film Transistors (OTFTs)" International Journal of Microelectronics and Digital integrated circuits, Vol.1, issue-2, pp.13-20, 2015.

A. D.D. Dwivedi, “Numerical Simulation and Spice Modeling of Organic Thin Film Transistors (OTFTs)" International Journal of Advanced Applied Physics Research, Vol.1, pp.14-21, 2014.

A.D.D. Dwivedi and Pooja Kumari "Numerical simulation and Characterization of pentacene based Organic thin film transistors with Top and Bottom Gate Configurations" Global Journal of Research in Engineering-F, Vol. 19 Issue 3: pp.7-12, (2019).

Narendra Singh Kushwah, A. D. D. Dwivedi "Computer modeling of Organic Thin film Transistors using Verilog-A" Journal of Microelectronics and Solid state Devices, Vol.5, pp 1-7, 2018.

Pooja Kumari, A. D. D. Dwivedi "Modeling and Simulation of Pentacene based Organic Thin Film Transistors with Organic Gate Dielectrics" Journal of Microelectronics and Solid state Devices, Vol.4, pp-12-17, 2017.

Pooja Kumari, A. D. D. Dwivedi "2D Numerical Simulation and Modeling of High Performance Pentacene Organic Thin Film Transistor based on Poly (3-Dodecylthiophene-2, 5-Diyl) Dielectric Layer" International Journal on Future Revolution in Computer Science & Communication Engineering, Vol.3, pp 5-7, 2017.

Sumit Vyas, A. D. D Dwivedi and Rajeev Dhar Dwivedi, " Effect of gate dielectric on the performance of ZnO based thin film transistor " Superlattices and Microstructures, Vol.120, pp.223-234, 2018.

Pooja Kumari and A. D. D. Dwivedi "TCAD Simulation and Performance Analysis of Single and Dual gate OTFTs" Surface Review letters, Vol. 1950145 pp.1-7, (2019). DOI: 10.1142/S0218625X19501452

A. D. D. Dwivedi, Rajeev Dhar Dwivedi, Raghvendra Dhar Dwivedi, and Qingda Zhao, “Technology computer aided design (TCAD) based simulation and compact modeling of Organic Thin Film Transistors (OTFTs) for circuit simulation” International Journal of Advanced Applied Physics Research Vol.6, pp.1-5, (2019).

Cite this Article

Pooja Kumari, Arun Dev Dhar Dwivedi. Numerical Simulation of Pentacene Based Organic Thin Film Transistor with Inorganic Gate Dielectrics. Journal of Microelectronics and Solid-State Devices. 2019; 6(2): 32–38p.

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Published

2019-09-23

Issue

Vol. 6 No. 2 (2019)

Section

Research Articles