Different Compressor Adders

Abstract

Abstract

Multipliers are one of the main blocks which decide the circuit performance as well as computation speed. In multiplication, addition of partial products contributes most to the circuit delay, power, and area. In this project, compressor adders are used to reduce this delay. Hence, compressors are a major part of the multiplier circuit that decides the overall speed of the system. For high-speed processing and higher systems, a huge number of compressors are to be used in partial product reduction. In this paper, different lower order compressor adders are analyzed. Architectures of 4:3, 5:3, 6:3, 7:3, 8:4, 9:4 and 10:4 compressor units are designed and analyzed. The hardware description is done in Verilog, and the software used for analysis is with Xilinx ISE 14.7 series. When these modified compressor adders are used in multiplier circuits, we can achieve better speed and efficiency.

Keywords: Compressor adders, multiplier, partial product reduction, Verilog, computational speed

Cite this Article

Aji Harikumar, Zacharia Reneesh C. Different Compressor Adders. Journal of Semiconductor Devices and Circuits. 2018; 5(2): 19–26p.