Design of Fault Tolerant Reversible Comparator

Abstract

Reversible circuits have proved its significance in the synthesis of circuits having their important role in nanotechnology, quantum computing, low power CMOS Design, cryptography and Bioinformatics. The Reversible Gates can be further made more beneficial if they prove themselves to be Fault Tolerant i.e. where errors can be detected and corrected at the same time. This Paper considers parity preserving technique for making Reversible circuits Fault Tolerant. Parity Preserving Gates refer to those gates in which parity of the output matches the parity of the input. In this Paper Parity Preserving Toffoli Gate and Parity Preserving URG Gate are proposed. This paper also proposes a Fault Tolerant Reversible Comparator designed using Proposed Parity Preserving Reversible Gates. Comparator is a widely used arithmetic block in many computer applications.