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Study and Design of Reconfigurable Processor Peripherals using Xilinx Tools

Ipseeta Nanda, Nibedita Adhikari



Xilinx Platform Studio used in this paper to create a reconfigurable processor system. The Xilinx Embedded Development Kit (EDK) software allows mapping processor of a Microblaze plus several on-chip peripheral bus (OPB) peripherals. The EDK bridges the gap between Hardware (HW) and Software (SW), flows by providing a single HW/SW design environment. Xilinx ISE is to create a top-level design hierarchy. It extends a fully software architecture by generating and integrating the cores, along with proper interfaces and the codes scheduling and synchronizing. Xilinx PlanAhead is used in creating Location (LOC) constraints for inputs and outputs. The possibility of dynamic and partial fly over run time configuration (PR) with the help of Xilinx PlanAhead offers to enable the substitution of the reconfigurable architecture to build reconfigurable processor system. The first graphical environment for partial reconfiguration provided by Xilinx PlanAhead, which gives the flexibility for changing a design in the field, reducing the board space and provides low power consumption. Here in this paper a model is prepared by using Xilinx EDK 9.1, Xilinx ISE 9.1 and Xilinx PlanAhead 9.2.4 to build reconfigurable processor system.


Keywords: Embedded development kit, On-Chip Peripherals, Partial reconfiguration, Internal Configuration Access Port, Design Rule Checks

Cite this Article

Ipseeta Nanda, Nibedita Adhikari. Study and Design of Reconfigurable Processor Peripherals using Xilinx Tools. Journal of Electronic Design Technology. 2018; 9(1): 17–23p.

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