A Double-Ended Read-Decoupled 8T SRAM Cell with Improved Read Stability and Access Time at 45 nm Technology

Abstract

Abstract

Due to rampant leveling of instrument measurements, the stability of an SRAM cell is the biggest anxiety for upcoming technology. In this paper, it is introduced by an 8T (8-transistor) SRAM cell. The enlarged data stability is offered by proposed cell until read operation. The voltage scale of the node keeping ‘0’ is enlarged by introduced cell and thus it achieves a near butterfly curve that is vital to creation a substantial SRAM cell. The read static noise margin or read SNM (RSNM) is as advanced as 223 mV @ 700 mV in 45 nm technology node and it is 3.01 times more stable than standard 6T SRAM cell during read operation. The introduced cell also gets 1.45 times lower latency at the equal voltage similitude to standard 6T SRAM cell.

Keyword: CMOS, Read Delay (latency), Read Stability, RSNM

Cite this Article

Anjali Pachauri, Nikhil Saxena. A Double-Ended Read-Decoupled 8T SRAM Cell with Improved Read Stability and Access Time at 45 nm Technology. Journal of Semiconductor Devices and Circuits. 2017; 4(2):      29–33p.