Energy-efficient and low-complexity linear phase filter design

Abstract

Digital signal processing (DSP) systems require digital filters as a critical component. DSP is one of the technologies that will have the biggest impact on science, engineering, and technology. For many portable signal processing applications, linear phase FIR filters with high throughput, good energy economy, and low latency are extremely desirable. The trade-off between performance indicators makes it difficult to boost throughput and energy efficiency while lowering low complexity. This study of existing high-performance FIR filter designs is done in this paper. The main goal is to decrease critical path complexity, latency, and delay in order to increase throughput. Cadence is used for performance parameter observation and simulation. An adequate conclusion could be reached by contrasting conventional, linear phase techniques with filter implementations for 16 and 32 tap sizes.