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Analysis of Cascaded Multilevel Inverter Induction Motor Drives

Vaibhav Srivastava

Abstract


The goal of this thesis is to use harmonic analysis to learn more about the performance of various cascaded multilevel inverters. To handle the high power demands of large electric drives and utility applications, innovative power electronics converters are required. As a result, in high power and medium voltage conditions, multiple power converter structures have been offered as an option. A multilayer converter not only achieves high power ratings, but it also enhances the whole system's performance in terms of harmonics, dv/dt strains, and stresses in a motor's bearings. There are three types of multilevel converter topologies: diode clamped, flying capacitors, and cascaded or H-bridge.
According to literature reviews, due to their modularity and extensibility, the cascaded multilevel inverter (CMI) with separated DC sources is obviously the most practical topology for usage as a power converter for medium and high power applications. The H-bridge inverter eliminates the need for I bulky transformers in typical multilevel inverters, (ii) clamping diodes in multilayer diodeclamped inverters, and (iii) flying capacitors in multilevel flying-capacitor inverters. The thesis studied and compared the most common multilevel topologies discovered in the published literature as a preliminary investigation. The various approaches to the building of a multilayer inverter are explained and compared, starting with the necessary needs. Aspects of total harmonic distortion (THD) and modulation that are required or desired for multilevel converters are examined in particular. For both technical and pedagogical grounds, sine-triangle carrier modulation is selected as the most promising technique to explore. Because cascaded multilevel inverters are ideal for medium and high power applications, this thesis compared the harmonic analysis of 3-level, 5-level, and 7-level cascaded multilevel inverters using analysis, simulation, and experiment. The sine triangle pulse width modulation (SPWM) approach, which is suited for any number of H-bridge converters, is used to balance the DC capacitor voltages. The cascaded PWM technique has been
implemented on FPGAs (field programmable gate arrays) (FPGA)


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References


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