Three-stage Decimation Filter Design with CIC and FIR Filters: A Review

Abstract

In this paper the design of decimation filter with three stages are considered and presented using the FDA tool of MATLAB. The decimation filter reduces the sampling rate of the signal while preserving the required data. The single stage filter is very difficult to implement because it requires more coefficients which results in bad frequency response so three stages of filters are considered, and further decimation is done. In filter design, at first stage a CIC filter is considered and then the other two stages will be FIR filters after each stage’s decimation will be made. In a direct-RF sampling receiver, out-of-band blockers that are folded into the signal band and quantization noise from an analog-to-digital converter (ADC) are minimised via cascaded integrator-comb (CIC) filters. Sigma-Delta ADCs use decimation filters to reduce the oversampled output data to a Nyquist sampling rate. The decimation filters, which take up most of the space and power consumption, control the ADC's overall performance