AMBA 3 AHB Lite Protocol design and verification

Abstract

As technology progresses, the amount of logic and transistors that can be packed on a device that runs an extreme integrated SoC design grows. The most significant feature of a SoC is its connectivity. In most SoCs, the AMBA (Advanced Microcontroller Bus Design) bus is the most often used on-chip bus design.
AMBA was first introduced by ARM. The AMBA AHB-Lite synthesizable design meets the requirements of high-performance synthesizable designs. Because it enables high clock frequency system modules, AHB transfers data between masters and slaves at a quicker rate. At the system level, this article describes the Advanced High-performance Bus Lite (AHB-Lite) subset of the Advanced Microprocessor Bus Architecture (AMBA) (AMBA). The development and testing of the AHB-Lite protocol for sequential and non-sequential transfers is also included in the study (increment and wrap of varied burst sizes). The Bus protocols are one of the important aspects to look upon, AHB which is part of AMBA consists of new features like bursts transfers which eventually increases the bandwidth and separates itself from the AMBA family’s APB and AXI. Internal memory devices, external memory interfaces, and high bandwidth peripherals are the most frequent AHB-Liteslaves. Although low-bandwidth peripherals can be incorporated as AHB-Lite slaves, they are commonly found on the AMBA Advanced Peripheral Bus for system performance reasons (APB). An AHB-Lite slave, also known as an APB bridge, is used to connect this higher level of bus to APB.