Which is the Best 10T Static CMOS Full Adder for Ultralow-Power Applications?

Authors

  • Manisha Guduri Department of Electronics and Communication Engineering, Birla Institute of Technology, Ranchi, Jharkhand, India
  • Vivek Kumar Agarwal Department of Electronics and Communication Engineering, Birla Institute of Technology, Ranchi, Jharkhand, India
  • Aminul Islam Department of Electronics and Communication Engineering, Birla Institute of Technology, Ranchi, Jharkhand, India

DOI:

https://doi.org/10.37591/jovdtt.v5i1.1584

Abstract

This paper presents the analysis of various 10-transistor CMOS 1-bit full adder circuits in terms of their output levels and finds out the suitable adder cell at 200 mV in subthreshold region at 16-nm technology node for ultra-low power applications. This paper also provides worst case output levels (sum and carry) of all the analyzed adder cells (which are presented in the paper) for various input combinations.

Keywords: CMOS, carry, 2:1 Multiplexer, sum, XOR gate

Cite this Article:

Guduri M, Agrawal VK, Islam A. Which is the Best 10T Static CMOS Full Adder for Ultralow-Power Applications? Journal of VLSI Design Tools and Technology (JoVDTT). 2015; 5(1): 45–50p.


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Published

2019-02-13

Issue

Vol. 5 No. 1 (2015)

Section

Articles

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