Switching Loss Calculation of Power MOSFET using the Estimation Technique

Authors

  • Soumya Sen Assistant Professor, Department of Electronics and Communication Engineering, Seacom Engineering College, Howrah, West Bengal, India
  • Souvik Saha Assistant Professor, Department of Electronics and Communication Engineering, University of Engineering and Management, Jaipur, Rajasthan, India
  • Angshuman Khan Assistant Professor, Department of Electronics and Communication Engineering, University of Engineering and Management, Jaipur, Rajasthan, India
  • Rajeev Arya Assistant Professor, Department of Electronics and Communication Engineering, National Institute of Technology, Patna, Bihar, India

DOI:

https://doi.org/10.37591/jovdtt.v10i1.3823

Abstract

An accurate analytical model is very important to measure the switching losses of Power
MOSFET. The perfect estimation of Power MOSFET switching loss is very difficult to predict
the efficiency of the power electronics circuit. This paper investigates the basic internal
physics of the Power MOSFET device and proposed the best possible analytical model to
calculate the power loss. The pre-existing widely accepted power loss calculation method is
found to be useless and inaccurate. In addition, the result of the pre-existing method is
overestimated to apply approximating switching time. This paper focused on new charge
parameters specification and switching time estimation technique to measure less erroneous
switching losses of Power MOSFET.


Keywords: DESSIS, Estimation technique, Power MOSFET, Switching loss, Sabre RD

References

References

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Published

2020-06-19

Issue

Vol. 10 No. 1 (2020)

Section

Articles

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