Vol. 7 No. 3 (2017)

Articles

• Implementation of RSA and CRT-RSA with MIST to Resist Power Analysis Attacks

  Hridoy Joy Mahanta, Ajoy Kumar Khan

  1-12

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• Effect of Various Parameters on Threshold Voltage of Virtually Fabricated Lightly Doped PMOS Device

  Nitin Sachdeva, Munish Vashishath, P. K. Bansal

  13-20

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• Low-Offset High Speed CMOS Voltage Comparator using 180 nm Technology

  Rohitkumar M. Joshi, Priyesh P. Gandhi

  21-27

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• Performance Analysis of 3T DRAM Using FinFET Based with Leakage Reduction Techniques at 45 nm Technology

  Bharat Tripathi, Saurabh Khandelwal

  28-34

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• Low Power High Speed Eight-Transistor (8T) SRAM Cell with Enhanced Data Stability

  P. Raikwal, V. Neema, A. Verma

  35-44

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• High Speed and Low Area Energy Efficient FPGA Implementation using RSD based Elliptic Curve Cryptography

  Abhay Arvind Koparde, K. Sujatha

  45-50

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• Carbon Nanotube Transistor Based Novel Ring Oscillator with Minimum Power Consumption at 32 nm Technology Node

  Chandramohan K, Nikhil Saxena, Sapna Navre, Sonal Soni

  51-54

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• Single Bit Low-Power High-Speed Full Adder

  Sachin Pandurang Gaikwad, Sujatha Kondakinda, Harsh Upadhyay

  55-60

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