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Test Pattern Generator for Built-in Self-test

Gargi Kaushik, Sangeeta Mangesh

Abstract


Low power BIST implementation is the need of the hour as testing is the most power-consuming process of chip operations. The power consumed during testing is almost twice as the power consumed during normal circuit operation. This paper gives the comparative analysis of power consumed by an improvised LFSR on two devices under test. The research also gives a decrease in number of logic gates in the circuit which is advantageous. For simulation, Modelsim is used, for power calculation we use QUARTUS II 13.1.


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References


Kavitha G. Seetharaman, Prabakar TN, Shrinithi S. Design of low power TPG using LP-LFSR. Third International Conference on Intelligent Systems Modelling and Simulation. 2012.

Wang L, McCluskey E. Circuits for pseudoexhaustive test pattern generation. IEEE Trans. Computer Aided Design. Oct1988; 7(10): 1068–80p.

Ahmed N, Tehranipoor MH, Naurani M. Low-transition LFSR for BIST-based applications. Computers IEEE Transactions. March 2008; 57(3).

Anitha R, Bagyaveereswaran V. Braun’s multiplier implementation using FPGA with bypassing techniques. International Journal of VLSI design & Communication Systems (VLSICS). September 2011; 2(3).

Wang S, Gupta SK. Dual speed LFSR: A new BIST TPG for low heat dissipation. Proc. ITC, IEEE. 1997.

Girard P. Survey of low power testing of VLSI circuits. IEEE Des. Test Comput. May June 2002; 19(3): 80–-90p.

Boye, Tian Wang Li. A novel BIST TPG for low power testing. IEEE. 2010.

Abdallatif S. Abu Issa, Steven F. Quigley. Bit swapping LFSR and scan chain ordering: A novel technique for peak and average power reduction in scan based BIST. IEEE Trans. for CAD of IC and Systems. May 2009.

Journal of Microelectronics and Solid State Devices

Volume 2, Issue 1

JoMSD (2015) 1-5 © STM Journals 2015. All Rights Reserved Page 5

Agrawal VD, Bushnell M. Essentials of Electronic Testing for Digital, Analog and Mixed-Signal VLSI Circuits. Kluwer Academic Publishers; 2000.

Thakur M., Design of Braun Multiplier with Kogge Stone Adder and its Implementation. International Journal of Scientific & Engineering Research. 2012.




DOI: https://doi.org/10.37591/jomsd.v2i1.5224

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