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Improvements in Analog Performance of Dual Metal Gate based Silicon-on-Insulator Junctionless Transistor with Pocket Doped Window

Priyansh Tripathi, Narendra Yadava, Mangal Deep Gupta, R. K. Chauhan

Abstract


This paper elucidates the impact of pocket doped window on the analog performance of dual metal gate based silicon-on-insulator junctionless transistor (DMG SOIJLT). The analog parameters of proposed SOIJLT is compared with DMG based conventional SOIJLT. The findings of analog performance comparison reveal that transconductance (gm), transconductance generation factor (TGF), output conductance (gd), output resistance (r0), intrinsic gain (AV), and cut-off frequency (fT) have improved for DMG PD-SOIJLT as compared to DMG SOIJLT. Improvements are also found in OFF-state leakage current (IOFF) and ON-OFF current ratio (ION/IOFF) for DMG PD-SOIJLT. The maximum values of gm, r0, and fT are improved by 4.46 times, 3.84 times, and 3.85 times respectively, and AV is improved by 21.07 times in ON-state, as compared to DMG SOIJLT. The device simulation and parameter extractions have been carried out using SILVACO ATLAS-2D  device simulator.

 


Keywords


Dual metal gate (DMG), silicon-on-insulator (SOI), junctionless transistor (JLT), pocket doped window, analog performance, output resistance and intrinsic gain.

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References


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