Low-Voltage Low-Power Single Supply Rail-to-Rail High Resolution Comparator in 0.18 µm CMOS Technology

Abstract

This paper presents an absolute input rail-to-rail ultrahigh-resolution comparator for low-voltage low-power applications. To enhance the input range rail-to-rail, the proposed comparator utilizes dynamic configuration with a MOSFET-only clock booster to supply a boosted voltage for pre-amplifier stage. Cadence SPICE simulations of the proposed comparator in a 0.18 μm CMOS process confirm the rail-to-rail input range with a supply voltage of 1.2 V with a decision time less than 9 ns. The dynamic power consumption of the proposed comparator is 59.3 μW with a clock frequency of 1 MHz.

Keywords: Rail-to-rail, charge pump, dynamic compartor, non-overlap clock, low voltage