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Delta Sigma Fractional N Frequency Synthesis

Md. Abdul Muqueem, Dr. V. Raju Reddy, A. Nikitha, R. Sandeepsai, D. Maniteja, K. Naresh

Abstract


Frequency synthesizers are fast becoming essential for several broadcast bands and circuits as communication technology has
improved. To meet this need, the fractional N frequency synthesizer was created. This synthesizer has proven its supremacy as a noteworthy
innovation by permitting various improvements over comparable concepts. Only when it is combined with delta-sigma modulation is this
possible. This combi- national circuit enhances frequency resolution and noise performance. PLL-based frequency synthesis is often used to
produce exceptionally stable oscillators. Delta-sigma modulators are used to control the division ratio in PLL-based fractional-N frequency
synthesizers. This partially satisfies the growing demand for synthesizers that operate at non-integer multiples. To manage the division ratio of
a PLL-based fractional-N frequency synthesizer that is playing a delta-sigma modulator, system-level analysis, and transistor implementation
were carried out. Understanding how the delta-sigma modulator affected the reduction of spurious tones in the synthesizer output was the goal of
the system-level analysis. Then, transistor-level individual circuit building blocks were created.


Keywords


— PLL, Synthesizer, accumulator, phase-noise, spurs.

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DOI: https://doi.org/10.37591/jovdtt.v13i2.7435

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