Vol. 6 No. 2 (2016)

Articles

• Challenges Beyond 100 nm MOS Devices

  savita maurya, sarita Shrivastava

  1-4

  • Requires Subscription PDF (USD 30)

• Design and Performance Trends of Low Power Sigma-Delta A/D Converters

  saima bashir, suhaib ahmed, vipan kakkar

  5-12

  • Requires Subscription PDF (USD 30)

• Layout Design, Fabrication and Characterization of n-Channel MOSFET

  savita maurya, savita Shrivastava

  13-18

  • Requires Subscription PDF (USD 30)

• Comparative Analysis of MOSFET, CNTFET and NWFET for High Performance VLSI Circuit Design: A Review

  sanjeev kumar sharma, balwinder raj, mamta khosla

  19-32

  • Requires Subscription PDF (USD 30)

• Design and Implementation of Low Power 8-bit Level Crossing ADC

  vaishali gupta, anil kumar gupta

  33-43

  • Requires Subscription PDF (USD 30)

• Design and RTL Implementation for AHB-APB Bridge on SoC

  shipra sharma, rakhi nangia, neeraj kumar shukla

  44-52

  • Requires Subscription PDF (USD 30)

• Implementation of Low Power Shift Registers Using Multi-Threshold CMOS Technique

  archana kumari, navdeep prashar

  53-61

  • Requires Subscription PDF (USD 30)

• Reusable Verification Framework of AMBA AHB-Lite Protocol using HDVL and UVM

  ashima gandhi, neeraj kr. shukla

  62-73

  • Requires Subscription PDF (USD 30)

• A New TGC-Differential Input Stage to Modify Dynamic Comparator

  anurag sharma, gurinderpal singh

  74-85

  • Requires Subscription PDF (USD 30)

• Analysis and Characterization of Different Topologies of Dynamic Latch based CMOS Comparators for Delay, Offset and Power

  Vijay Savani, N M Devashrayee

  86-98

  • Requires Subscription PDF (USD 30)

• Implementation and Simulation of High-Speed Dynamic Latch Comparator for ADC

  jatin A. jalal, mehul L Patel

  99-103

  • Requires Subscription PDF (USD 30)

• Functional Verification of AMBA AHB-Lite using Layered Testbench Technology of System Verilog

  ashima gandhi, neeraj kr. shukla

  104-112

  • Requires Subscription PDF (USD 30)