Hulkey, M., Department of Electronics & Telecommunication Engineering, SRCOE, Pune, India, India
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Vol 6, No 1 (2016) - Articles
A Novel Logic Styles used for Leakage Power Reduction in MOS Integrated Circuit
Abstract -
Vol 6, No 1 (2016) - Articles
A Review for Power Optimization in MOS Devices using Different Logic Styles
Abstract
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