Yadav, Rajesh, Department of Electrical and Electronics Engineering, ITM University, Gurgaon, Delhi-NCR, India, India
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Vol 5, No 3 (2015) - Articles
All-Digital Phase Locked Loop (ADPLL) as an Intellectual Property (IP) Core for an Application-specified Integrated Circuit (ASIC) Product: A Survey
Abstract
eISSN: 2249–474X