Journal of VLSI Design Tools & Technology (JoVDTT)

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Home > Archives > Vol 5, No 3 (2015)

Table of Contents

Articles

A Review on Charge Pump Circuits for PLL Applications D. Shekhar, A. Raman

PDF 1-11

All-Digital Phase Locked Loop (ADPLL) as an Intellectual Property (IP) Core for an Application-specified Integrated Circuit (ASIC) Product: A Survey Rajesh Yadav, Neeraj Kumar Shukla, Rajesh Gupta

PDF 12-17

CMOS Gm-C IF Filter using SCA for Dual Band Receiver Kehul A. Shah, NM Devashrayee

PDF 18-36

Design and Performance Analysis of Multi-Standard CMOS LNA Using Switched Capacitor and MIM Capacitor in 180nm Technology Nishant Poras, Priyanka Goyal

PDF 37-44

Memristor Modelling for Common Source Amplifier Using 180 nm Technology Herman Al Ayubi, Navaid Z. Rizvi, Piyush Kumar Mishra

PDF 45-54

Design and Implementation of an Efficient Ternary Control Unit Satish S. Narkhede, BS Chaudhari, GK Kharate

PDF 55-70