Journal of VLSI Design Tools & Technology (JoVDTT)

Vol 8, No 1 (2018)

Open Access  Subscription or Fee Access

Table of Contents

Articles

Fault Detection Attainment for Embedded Cores based on Software Test Routines Vishal Gangadhar Puranik, Dilip Devchand Shah

PDF 1-6

High Speed Low Offset Power Efficient Fully Differential Double Tail Dynamic Comparator Priyesh Gandhi, N. M. Devashrayee

PDF 7-16

Memristor based Material Implication Logic for Implementation of Basic logic Gates and Circuits Rita Mahajan, Basudha Dewan, Deepak Bagai

PDF 17-22

AXI Bridge and DMA/Bridge Subsystem for PCIe Shivani Malhotra, Neelam Rup Prakash

PDF 23-29

Comparative Analysis of Combinational Circuit Using Reversible Logic Based Techniques Aakriti Dawarand, Bal Krishan

PDF 30-33

High Speed and Low Power Basic Digital Logic Gates, Half-Adder and Full-Adder Using Modified Gate Diffusion Input Technology Khoirom Johnson Singh, Tripurari Sharan, Huirem Tarunkumar

PDF 34-42

Review Paper: Low Power SRAM Cell using FinFET Technology Mamta ., Surender Kumar Grewal

PDF 43-47

Review Paper To Design a Low Power CNTFET Based XOR Gate Veski Dabas, Surender Kumar Grewal

PDF 48-53

eISSN: 2249–474X