Vol. 5 No. 2 (2015)

Articles

• Design and Analysis of an Efficient Fast Low Power 1 Kb SRAM Cell Using 90nm and 45 nm Microwind Technology

  A.K. Pathrikar, Rajkumar S. Deshpande

  1-3

  • Requires Subscription PDF (USD 30)

• Comparative Analysis of High Speed Comparator for A to D Converters

  Priyesh Gandhi, Neha B. Rathod, N. M. Devashrayee

  4-10

  • Requires Subscription PDF (USD 30)

• Comparative Study of (Operational Transconductance Amplifier) OTA to Design Low Pass Filter

  Aakansha Barala, Pooja Sabherwal, Meenakshi Yadav

  11-15

  • Requires Subscription PDF (USD 30)

• 4-Bit Magnitude Comparator Design using Different Logic Styles

  Vipul Mittal, Tanushree ., Madhulika Arora, Meenakshi Yadav, Sakshi Chaudhary

  16-22

  • Requires Subscription PDF (USD 30)

• A Novel Efficient VLSI Architecture for Matrix Multiplication using Compressor-based Multiplier

  Kirti Sharma, Anushree .

  23-28

  • Requires Subscription PDF (USD 30)

• Efficient Analysis and Minimization of Glitches using Threshold Swapped Combinational Clock Gating

  J. Sudhakar, A. Mallikarjuna Prasad, Ajit Kumar Panda

  29-37

  • Requires Subscription PDF (USD 30)

• Review of Design and Implementation of Adder with Increasing Bits by Using Constant Delay Logic Style

  Megha Hulkey, Harshvardhan Upadhyay

  38-41

  • Requires Subscription PDF (USD 30)

• Hardware Optimization of FPGA for I2C Master Protocol and Interfacing with EEPROM Slave

  Pragya Sharma, Neeraj Kr. Shukla, Rakhi Nangia

  42-48

  • Requires Subscription PDF (USD 30)

• Automated Access Backdoor for UVM_REG Layer

  Seep Sethi, Neeraj Kr. Shukla

  49-53

  • Requires Subscription PDF (USD 30)

• Characterization of High Performance Third Generation Current Conveyor using CMOS Technology

  Megha M. Patel, Nilesh D. Patel

  54-63

  • Requires Subscription PDF (USD 30)

• Comparative Analysis of Class-AB Voltage Follower using DTMOS Transistor

  Nishtha K. Patel, Nilesh D. Patel

  64-70

  • Requires Subscription PDF (USD 30)

• Design of 8 Bit High Speed Pipelined ADC

  Shivani R. Patel, Priyesh P. Gandhi

  71-80

  • Requires Subscription PDF (USD 30)

• Tuning Range, Phase Noise and Jitter Analysis of Current Starved Voltage Controlled Oscillator (VCO) for Digital PLL in 45 nm CMOS Technology

  Bharat H. Nagpara

  81-89

  • Requires Subscription PDF (USD 30)