|
Issue |
Title |
|
Vol 3, No 1 (2013) |
Reducing Crosstalk in Arithmetic and Logic Unit Part of a Processor |
Abstract
|
Mujeeb Ulla Jeelani, Venkatesh Kumar N., Anoop S. Shandilya |
|
Vol 9, No 1 (2019) |
Reusable FM0/Manchester Encoding Using QCA |
Abstract
|
Harshada Dayanand Malage, Usha Jadhav |
|
Vol 6, No 2 (2016) |
Reusable Verification Framework of AMBA AHB-Lite Protocol using HDVL and UVM |
Abstract
|
ashima gandhi, neeraj kr. shukla |
|
Vol 5, No 2 (2015) |
Review of Design and Implementation of Adder with Increasing Bits by Using Constant Delay Logic Style |
Abstract
|
Megha Hulkey, Harshvardhan Upadhyay |
|
Vol 6, No 1 (2016) |
Review Paper on Static and Dynamic Power Dissipation of Novel CMOS SRAM Cell |
Abstract
|
Jitendra Krishna Arya, Ashish Raman |
|
Vol 8, No 1 (2018) |
Review Paper To Design a Low Power CNTFET Based XOR Gate |
Abstract
|
Veski Dabas, Surender Kumar Grewal |
|
Vol 8, No 1 (2018) |
Review Paper: Low Power SRAM Cell using FinFET Technology |
Abstract
|
Mamta ., Surender Kumar Grewal |
|
Vol 10, No 2 (2020) |
Simulation and Analysis of Grid Integrated Solar PV System under Variable Climatic Conditions |
Abstract
|
Surghyan Haritwal, Bharat Bhushan Jain |
|
Vol 10, No 1 (2020) |
Simulation of Three Section Multilevel Inverter with Reduced Range of Switches |
Abstract
|
HARSHIT PANDAY |
|
Vol 6, No 1 (2016) |
Simulation Study of Tapered Shape FinFET |
Abstract
|
A. Shrivastava, S. Singh, A. Acharya, G Musalgaonkar |
|
Vol 7, No 3 (2017) |
Single Bit Low-Power High-Speed Full Adder |
Abstract
PDF
|
Sachin Pandurang Gaikwad, Sujatha Kondakinda, Harsh Upadhyay |
|
Vol 7, No 2 (2017) |
Single Bit Low-Power High-Speed Full Adder |
Abstract
|
Sachin Pandurang Gaikwad, Sujatha kondakinda, Harsh Upadhyay |
|
Vol 12, No 3 (2022) |
Smart Home Automation Using ESP32 |
Abstract
|
Sahab Lal Yadav, Vineet Kumar Gautam, Pradeep Prajapati, Santosh Kumar Singh |
|
Vol 13, No 2 (2023) |
Study And Literature Analysis of The Coarse-Grained Logic Interface with Floating-Point Arithmetic Unit |
Abstract
|
Devendra Singh Thakur, Sateesh Kourav, Prof. Sunil Kumar Shah, Yashwant Singh Thakur |
|
Vol 12, No 3 (2022) |
Study of Signal Processing Using Applications of Fourier Series |
Abstract
|
Suchita Shelke, Sayali Choudhari, Kunal Lal Bahadur Sharma, Kajal Kumari Shah |
|
Vol 6, No 3 (2016) |
Survey of System-on-Chip Modular Test Approach |
Abstract
|
harpreet vohra, amardeep singh |
|
Vol 6, No 1 (2016) |
Switched Capacitor-based RC Filter |
Abstract
|
jinal A prajapti, Mehul L Patel |
|
Vol 10, No 1 (2020) |
Switching Loss Calculation of Power MOSFET using the Estimation Technique |
Abstract
|
Soumya Sen, Souvik Saha, Angshuman Khan, Rajeev Arya |
|
Vol 2, No 1-2-3 (2012) |
System Level Modeling of ISMB Quadrature Transceiver |
Abstract
PDF
|
Narendra Bahadur Singh, rupam goswami, prashant singh |
|
Vol 2, No 1-2-3 (2012) |
Technology Limits on Differential Gain and Unity-gain Bandwidth of a Differential Amplifier: A Theoretical Analysis |
Abstract
PDF
|
alpana agarwal, chandra shekhar |
|
Vol 13, No 2 (2023) |
The Comprehensive Study of Gallium Nitride (GaN) Semiconductor Technology |
Abstract
|
Hardik Modi, Sagarkumar Patel, Shaili Joshi, Nupur Shah |
|
Vol 9, No 2 (2019) |
The Efficiency of Solar Panel: Case Study of Cross River State University of Technology, Nigeria |
Abstract
PDF
|
E. C. Christopher, A. I. Tunde |
|
Vol 10, No 3 (2020) |
The Study on Energy-Efficient Context-Aware Architecture for Wired or Wireless Communication System |
Abstract
|
Sachin kumar |
|
Vol 1, No 1-2-3 (2011) |
Time Domain Analysis in an On-chip High Speed RLCG Interconnection Network at 0.18 µm Technology |
Abstract
PDF
|
Rajib Kar |
|
Vol 11, No 3 (2021) |
Transient Analysis of Electronic Circuits Including Zener Diodes |
Abstract
|
Mohamed Mostafa Saied |
|
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