Browse Title Index


 
Issue Title
 
Vol 7, No 3 (2017) Implementation of RSA and CRT-RSA with MIST to Resist Power Analysis Attacks Abstract   PDF
Hridoy Joy Mahanta, Ajoy Kumar Khan
 
Vol 7, No 2 (2017) Implementation of RSA and CRT-RSA with MIST to Resist Power Analysis Attacks Abstract
Hridoy Jyoti Mahanta, ajoy kumar khan
 
Vol 8, No 2 (2018) Investigation and Dependency Analysis of Silicon Film Thickness on Performance of Surrounding Gate MOSFET at Subthreshold Regime Abstract
Tarun Kumar Sachdeva, S. K. Agarwal, Alok K. Kushwaha
 
Vol 10, No 2 (2020) Investigations on the impact of modulation formats and weather conditions in FSO link employing polarization division multiplexing and coherent detection-orthogonal frequency division multiplexing Abstract
Tanu Shri
 
Vol 6, No 2 (2016) Layout Design, Fabrication and Characterization of n-Channel MOSFET Abstract
savita maurya, savita Shrivastava
 
Vol 11, No 1 (2021) Leveraging cross-coupled domino logic for low-power, two-port SRAM with resilience to Differential Power Analysis (DPA) attacks Abstract
Mohil Sandip Desai, Dr. Anu Gupta
 
Vol 6, No 3 (2016) Linearity Analysis of Traditional Single and Double Balanced Down Conversion Mixers Abstract
akash I mewan, N M Devashrayee
 
Vol 3, No 2 (2013) Logic Optimization Algorithm based on Shannon’s Expansion: Reduction in Area, Power and Delay for Pass Gate Implementation Abstract
Usha Sandeep Mehta, Vaishali Dhare, Harikrishna Parmar, Rahul A. Shah
 
Vol 4, No 1 (2014) Low Power 8-Bit Square Root Carry Select Adder Constructed By Using 8 Transistor Full Adder Abstract
A unmai
 
Vol 7, No 3 (2017) Low Power High Speed Eight-Transistor (8T) SRAM Cell with Enhanced Data Stability Abstract   PDF
P. Raikwal, V. Neema, A. Verma
 
Vol 7, No 2 (2017) Low Power High Speed Eight-Transistor (8T) SRAM Cell with Enhanced Data Stability Abstract
P. Raikwal, V Neema, A Verma
 
Vol 2, No 1-2-3 (2012) Low Power RF QPSK MODEM Design Abstract   PDF
Narendra Bahadur Singh, rupam goswami, prashant singh
 
Vol 7, No 3 (2017) Low-Offset High Speed CMOS Voltage Comparator using 180 nm Technology Abstract   PDF
Rohitkumar M. Joshi, Priyesh P. Gandhi
 
Vol 7, No 2 (2017) Low-Offset High Speed CMOS Voltage Comparator using 180 nm Technology Abstract
Rohitkumar M. Joshi, priyesh p gandhi
 
Vol 7, No 1 (2017) Low-Power Design of Content Addressable Memory using Master Slave Match Line Architecture Abstract
boda venkata lakshmi, Boggavarapu satish kumar
 
Vol 2, No 1-2-3 (2012) Low-Voltage Low-Power Single Supply Rail-to-Rail High Resolution Comparator in 0.18 µm CMOS Technology Abstract   PDF
Anil K. Saini, priyanka dwivedi, sanjay singh
 
Vol 9, No 3 (2019) Maximum Power Point Tracker and its model in MATLAB Abstract
Manish Kumar Jha
 
Vol 8, No 1 (2018) Memristor based Material Implication Logic for Implementation of Basic logic Gates and Circuits Abstract
Rita Mahajan, Basudha Dewan, Deepak Bagai
 
Vol 5, No 3 (2015) Memristor Modelling for Common Source Amplifier Using 180 nm Technology Abstract
Herman Al Ayubi, Navaid Z. Rizvi, Piyush Kumar Mishra
 
Vol 11, No 2 (2021) Methodical Strategy for STATCOMs Optimal Placement to Enhance Voltage Stability Margin Considering Circular Optimization Algorithm Abstract
Saurabh Ratra, Kanwardeep Singh
 
Vol 4, No 1 (2014) Methodology of Standard Cell Library Design in .LIB Format Abstract
Pritam Bhattacharjee
 
Vol 6, No 1 (2016) Modeling of Voltage Buffer and Memristor Voltage Buffer Using 180 nm Technology Abstract
Herman Al Ayubi, navaid Z. rizvi, piyush K. Mishra
 
Vol 11, No 1 (2021) Modelling and Simulation of MPPT Boost Converter in MATLAB Abstract
Nilesh D. Patel
 
Vol 10, No 2 (2020) Modelling of DC-DC Adapter use Intent of Photovoltaic Module Coordinating with Load Abstract
Bharat Bhushan Jain, Anil Dagur
 
Vol 1, No 1-2-3 (2011) Modelling of Skin Effect in On-Chip VLSI RLC Global Interconnect Abstract   PDF
vikas maheshwari, shilpi lavania, rajib kar, durbadal mandal, A. K. Bhattacharjee
 
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