Browse Title Index


 
Issue Title
 
Vol 3, No 3 (2013) Power-delay Product Optimal Design of Sequential Circuits Using Carbon Nanotubes Abstract
Mahesh Soni, Vineet Sahula
 
Vol 5, No 1 (2015) Real Time FPGA-based Embedded Architecture of Audio Compression and Decompression Core for Multimedia System Abstract
Moumita Acharya, Shreedeep Gangopadhyay
 
Vol 3, No 1 (2013) Reconfiguring CMOS Driver and Receiver Pair as Pseudo NMOS for Low-swing Signaling On-chip Interconnects Abstract
Balaji B. S.
 
Vol 3, No 1 (2013) Reducing Crosstalk in Arithmetic and Logic Unit Part of a Processor Abstract
Mujeeb Ulla Jeelani, Venkatesh Kumar N., Anoop S. Shandilya
 
Vol 9, No 1 (2019) Reusable FM0/Manchester Encoding Using QCA Abstract
Harshada Dayanand Malage, Usha Jadhav
 
Vol 6, No 2 (2016) Reusable Verification Framework of AMBA AHB-Lite Protocol using HDVL and UVM Abstract
ashima gandhi, neeraj kr. shukla
 
Vol 5, No 2 (2015) Review of Design and Implementation of Adder with Increasing Bits by Using Constant Delay Logic Style Abstract
Megha Hulkey, Harshvardhan Upadhyay
 
Vol 6, No 1 (2016) Review Paper on Static and Dynamic Power Dissipation of Novel CMOS SRAM Cell Abstract
Jitendra Krishna Arya, Ashish Raman
 
Vol 8, No 1 (2018) Review Paper To Design a Low Power CNTFET Based XOR Gate Abstract
Veski Dabas, Surender Kumar Grewal
 
Vol 8, No 1 (2018) Review Paper: Low Power SRAM Cell using FinFET Technology Abstract
Mamta ., Surender Kumar Grewal
 
Vol 6, No 1 (2016) Simulation Study of Tapered Shape FinFET Abstract
A. Shrivastava, S. Singh, A. Acharya, G Musalgaonkar
 
Vol 7, No 3 (2017) Single Bit Low-Power High-Speed Full Adder Abstract   PDF
Sachin Pandurang Gaikwad, Sujatha Kondakinda, Harsh Upadhyay
 
Vol 7, No 2 (2017) Single Bit Low-Power High-Speed Full Adder Abstract
Sachin Pandurang Gaikwad, Sujatha kondakinda, Harsh Upadhyay
 
Vol 6, No 3 (2016) Survey of System-on-Chip Modular Test Approach Abstract
harpreet vohra, amardeep singh
 
Vol 6, No 1 (2016) Switched Capacitor-based RC Filter Abstract
jinal A prajapti, Mehul L Patel
 
Vol 2, No 1-2-3 (2012) System Level Modeling of ISMB Quadrature Transceiver Abstract
Narendra Bahadur Singh, rupam goswami, prashant singh
 
Vol 2, No 1-2-3 (2012) Technology Limits on Differential Gain and Unity-gain Bandwidth of a Differential Amplifier: A Theoretical Analysis Abstract
alpana agarwal, chandra shekhar
 
Vol 9, No 2 (2019) The Efficiency of Solar Panel: Case Study of Cross River State University of Technology, Nigeria Abstract   PDF
E. C. Christopher, A. I. Tunde
 
Vol 1, No 1-2-3 (2011) Time Domain Analysis in an On-chip High Speed RLCG Interconnection Network at 0.18 µm Technology Abstract
Rajib Kar
 
Vol 4, No 2 (2014) Triangular Waveform Generation using Mixed Signal Modeling Abstract
amit krishna dwivedi, A. Islam
 
Vol 5, No 2 (2015) Tuning Range, Phase Noise and Jitter Analysis of Current Starved Voltage Controlled Oscillator (VCO) for Digital PLL in 45 nm CMOS Technology Abstract
Bharat H. Nagpara
 
Vol 6, No 3 (2016) VHDL Implementation of Network-on-Chip Router using Round Robin Arbiter Abstract
minakshi m wanjari, pankaj agrawal, ravindra kashirsagar
 
Vol 5, No 1 (2015) Which is the Best 10T Static CMOS Full Adder for Ultralow-Power Applications? Abstract
Manisha Guduri, Vivek Kumar Agarwal, Aminul Islam
 
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